Group A

Group A
Introduction to IC design flow; System specification to final packaging.
MOS transistor, CMOS inverter, static and dynamic logic circuits, latch up problem in
Factors for optimization (speed, power, area, etc.)
Timing issues: Clock skew, critical path, logic hazards, etc.
Interconnect: Capacitive, resistive and inductive parasitics.
Basic concepts of partitioning, floor planning, placement, routing and layout. Design rule and
circuit extraction, mask making procedure.
Computer aided design, simulation and testing, behavioural modelling and hardware
description language.

Group B


Memories and other replicable structures: ROM, PROM, EPROM, E2PROM, Static RAM
and dynamic RAM, PLA and PAL.
Basic design methodologies: Full custom and semi-custom design. ASIC vs. field
programmable devices.
Basic fabrication technology: Bipolar and MOS processing steps and important process
Importance of semiconductor device modeling. Computer aided design.



© Copyright 2008. All right reserved - AMIE Students